NASA tests palm-sized space processor 100 times more powerful and built for harsh space conditions

NASA has revealed that it is currently conducting a rigorous test campaign at its Jet Propulsion Laboratory (JPL) for a new high-performance processor, which will revolutionize the computational capacity of future spacecraft. Part of the agency’s High Performance Spaceflight Computing project, this new system-on-a-chip (SoC) aims to provide up to 100 times the computational power of current spaceflight computers, which the agency claims will enable a faster rate of scientific discovery. Testing began in February at JPL in Southern California, and so far, results from testing have shown the processor is working as designed, even when put under severe duress. 

The necessity for such an upgrade and testing stems from the extreme environments of space that send spacecraft into "safe mode," which shuts down non-essential systems on a spacecraft and demands the intervention of mission controllers on the ground. According to Jim Butler, HPSC project manager at JPL, engineers are putting these new chips through a battery of radiation, thermal, and shock tests while also evaluating their performance through it all. These tests simulate electromagnetic radiation from the Sun and extreme temperature swings that can degrade electronics. Unlike the processors found in everyday smartphones, these SoCs are built to last for years of bombardment by high-energy particles in deep space as well, even when billions of miles away from Earth. 

In order to replicate real-world performance, the team is also using high-fidelity landing scenarios from actual NASA missions. This requires large amounts of processing power to make sense of the enormity of sensor data transmitted in such scenarios. Eugene Schwanbeck, program element manager in NASA’s Game Changing Development program at the agency’s Langley Research Center in Virginia, stated, “Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing.” The team managed to bring together all the key components of a computer, like central processing units, memory, and advanced networking units, into a single SoC smaller than the palm of a hand.

The project is the result of a commercial partnership between JPL and Microchip Technology Inc. The Arizona-based company was selected as a partner in 2022 and funded its own research and development for the processor. NASA's Space Technology Mission Directorate's Game Changing Development (GCD) program manages the project, and together with JPL, it developed the mission requirements of the HPSC technology. Microchip has already provided samples to early-access partners across the wider defense and commercial aerospace industries. Schwanbeck attested to this collaborative nature of the effort, going on to state, “NASA’s commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration." 

Once the chip is fully certified for spaceflight after another few months of testing, its application will extend far beyond low Earth orbit. The agency plans to incorporate the hardware into autonomous spacecraft and use it to support astronauts on missions to the Moon and Mars. It is worth remembering that NASA has already taken the first steps towards establishing a Moon Base with Artemis II and will deploy a whole host of hardware on the lunar south pole. This will include habitation modules, human landing systems, and pressurized rovers. “This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps," said Butler.

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